关于寄存器重命名register reallocation,VHDL

基于FPGA的VGA驱动代码VHDL 在显示屏显示一个汉字-FPGA-based VHDL code of the VGA driver that a character in the display

用blockram实现移位寄存器，开发语言为verilog hdl(Shift register with blockram achieve the development language for the verilog hdl)

8086微机原理实验：8251串行接口、8253计数器、数码管、跑马灯。汇编语言。(8086 microcomputer principle experiment: 8251 serial interface, the 8253 counter, digital tube, Marquee. Assembly language.)

本文为verilog的源代码-In this paper, the source code for Verilog

密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)

用CPLD驱动数码管，实现从0000计到9999，数码管是用动态显示，程序用VERILOG完成的-CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG

40M时钟输入经过iserdes倍频到960M(input 40M o clock and output 960M )

LS165移位寄存器的verilog语言编写(The writing of the Verilog language of LS165 shift register)

用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in

图像采集、存储控制verilog源代码(Image acquisition, storage, control of Verilog source code)