简单电子玩具的感知模块程序设计,通过外部输入信号改变内部信号.从而改变玩具的状态

i2c总线的工程实现，可以用在altera环境下验证-i2c bus project implementation can be used in altera verification environment

UART_DMA的方法是使用nios实现UART方式实现DMA传输，在硬件平台上通过验证实现(UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by)

PID算法控制点击速度，PWM脉宽调制方法(PID algorithm to control the motor Speed)

用verilog实现sobel边缘检测算法(sobel edge detection with verilog language)

ALTERA NIOS处理器，VHDL语言在QUARTUS编译通过，然后有C语言在NIOS SHELL下驱动，实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder

ARM处理器的IP核，用verilog编写的，对处理器和相关的CPU架构知识有很大帮助。(ARM processor IP core, written in verilog processor and CPU architecture knowledge.)

it has 6 packages of 8051 sources,including source code(VHDL and Verilog),dc scripts, pdfs, netlists etc. and a MIPS IP package

说明：  实现24小时计时，因为位数不够，这里是12进位，可自行调整进位数(Realize 24-hour timing, because the number of digits is not enough, here is 12 carry, you can adjust the carry number by yourself.)

VHDL的重要PPT资料,对初学者非常有益处-VHDL important PPT information is very useful for beginners

Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola MPC 8260 or Intel StrongArm, the interface to the SDRAM is supported by the processor’s built-in peripheral module.