It s a 8051 VHDL source code issued by Original.

电子秒表，FPGA实现,本科某课程设计，程序注释非常详细，(FPGA TIME-COUNTING)

this describes building spi block on verilog hdl and programming them on an fpga device

16位的移位寄存器，加上testbench,可以在modelsim里面运行~-16 of the shift register and testbench, modelsim the inside running ~

用VHDL语言编写的LED显示器驱动电路的设计源程序-using VHDL prepared by the LED display driver circuit design source

SAP-1硬件描述语言（使用Verilog语言）

基于FPGA的调制，实现了QPSK调制，所用芯片为Artera的CycloneIIEp2C5T114C8-FPGA-based modulation, realize the QPSK modulation, the chip used for Artera

Avt_S6LX9_MicroBoard_UCF_110127，有关xilinx spartan6开发板的相关参考设计。(Adding Custom IP to an Embedded System, the relevant reference on xilinx design.)

verilog实现的“六进制约翰逊计数器”。-verilog implementation of the " six hexadecimal Johnson counters."

一位加法全加器，可以实现低位进位输入和高位进位输出。(full adder)

这是一个数字逻辑课程的电子表的实现，利用VHDL语言实现，初学者可以完全掌握，很有帮助。(This is the realization of the electronic timepiece a digital logic course, the use of VHDL language, beginners can fully grasp and helpful.)