vhdl code for multiplexer and detemines how multiplexer works

一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)

practical_lift_controller 实用电梯控制器 实用电梯控制系统block symbol file 实用电梯控制器的Verilog HDL程设计-practical utility practical_lift_controller elevator controller elevator control system block symbol file utility elevator controller Verilog HDL-way design

This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.

联邦滤波法，毕设时写的，可以和其他方法的做比较(Kalman filter, write the complete set up, and other methods to compare)

此两文件是在MAXplusII环境下开发并运行通过的VHDL文件，实现了并串口转换功能。-this document is in two MAXplusII environment through the development and operation of the VHDL documents, and the realization of serial conversion function.

DDS波形生成器verilog语言书写（FPGA型号cy4以上）(DDS generate verilog)

Browser modularization processing, browser modularization combing, browser modularization expansion

说明：  文档科斯塔斯环路滤波器。。。。。般若撒根本(wendangsafwrfgvearbeabf)

VGA显示FPGA实现的VHDL语言的贪吃蛇游戏设计 本设计分为6个模块主要是扫描模块 VGA现实和控制模块 游戏设计的模块 电源模块等 用QUARTUS2仿真运行(VGA display FPGA VHDL language to realize the Snake game design The design is divided into six modules mainly scanning module VGA module power module and control module reality game design, etc. Simulation run with QUARTUS2)

FPGA 学习实例 动态时钟、面积、速度优化相关代码(Codes related to dynamic clock, area and speed optimization for learning examples of FPGA)