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429recive
实现FPGA接收429板卡发送的信号,并根据数据最后两位点亮相应的LED。(FPGA to achieve the 429 board to receive the signal sent, and according to the data of the last two of the corresponding LED.)
- 2015-11-26 11:18:19下载
- 积分:1
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VHDLAVRIPcore
说明: 使用VHDL语言写的AVR单片机IP核, 可以直接使用,已经经过验证, 十分珍贵哦(Written in VHDL language using the AVR microcontroller IP core, can be used directly, has proven very valuable oh)
- 2009-08-28 14:00:29下载
- 积分:1
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f_adder
一位加法全加器,可以实现低位进位输入和高位进位输出。(full adder)
- 2009-12-24 15:40:39下载
- 积分:1
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32FIRVHDL
基于FPGA的32阶FIR数字滤波器设计 源程序。设计使用了并行乘法器,运行速度更快,占用内存更小,延迟更小。
(32 order FIR digital filter based on FPGA design source program. Design USES parallel multiplier, faster and less memory, less delay.)
- 2014-05-12 21:11:19下载
- 积分:1
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VGA字符显示VHDL程序
可以直接用于工程的设计与开发
VGA字符显示VHDL程序
可以直接用于工程的设计与开发-VGA display characters can be directly used for VHDL design and development
- 2022-01-24 18:21:47下载
- 积分:1
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Several common multiplier Verilog, VHDL code
几种常用乘法器的Verilog、VHDL代码-Several common multiplier Verilog, VHDL code
- 2022-03-12 09:47:07下载
- 积分:1
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Lpfilter_20190503
说明: 环路滤波器是通信信号调制解调中最重要的一个部分,环路滤波器设计的好坏将直接影响到接收机的性能指标,二阶锁频辅助三阶锁相环路滤波器可以稳定跟踪具有加加速度的信号源,是现代通信中非常实用的技术,本文中详细编写了单载波信号产生模块、信道噪声模块、数字正交下变频模块、鉴频鉴相模块、环路滤波器模块,并包含了完整的testbench模块,对于初学者非常有用。(Loop filter is the most important part of communication signal modulation and demodulation. The design of loop filter will directly affect the performance index of receiver. The second-order frequency locking assisted third-order phase-locked loop filter can stably track the signal source with acceleration speed, which is a very practical technology in modern communication. In this paper, the single carrier signal generation module and channel noise are written in detail Sound module, digital orthogonal down conversion module, frequency and phase detection module, loop filter module, and contains a complete testbench module, which is very useful for beginners.)
- 2020-11-11 01:27:25下载
- 积分:1
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VHDL描述的时钟分频电路,用途广
VHDL描述的时钟分频电路,用途广-VHDL description of the clock divider circuit, uses widely ...
- 2022-03-10 15:35:57下载
- 积分:1
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CPLD
控制三相步进电机及光电编码器的采集,当电机停止时,保证三相里面只有一相相通,防止停止时电流过大.(Control three-phase stepper motor and optical encoder collection, when the motor stops to ensure that only one phase of three-phase inside the heart, and to prevent too much current is stopped.)
- 2008-05-26 11:37:38下载
- 积分:1
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Synopsys-RTLSystemC
synopsys的systemc和RTl书籍清晰电子版,专业权威的EDA公司的培训资料(synopsys of systemc and RTl clear electronic version of books, professional authority of the EDA company' s training materials)
- 2010-08-11 11:49:49下载
- 积分:1