HDLC接口协议的FPGA实现使用verilog

UART 源码 (lattice version)-UART source (lattice version)

基于FPGA的FFT处理器的实现，适合做fpga的工程技术人员参考-FPGA-based realization of the FFT processor, suitable for the engineering and technical personnel fpga reference

32位存储器Verilog附带test文件，可以在modulesim仿真 还有加法、减法器，译码器等常用Verilog器件，都附带仿真test。(Memory test with Verilog)

最近在做毕设，ldpc码的编解码实现，这个是verilog实现。(Recently completed the set up to do, ldpc code codec implementation, this is the Verilog implementation.)

这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences

Some useful things to know about picoblaze microcontroller.

基于altera系列芯片lvds接口的fpga设计 verilog源码-Series altera-based chip interface lvds source fpga design verilog

You well get all details about project and microcontroller

fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过-fir in dspbuilder VHDL source code under test and document the incentive mat lab model, the simulation under through modelsim

ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，然后NIOS　SHELL下C 语言运行。实验SRAM和DMA调度-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling