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3he11
产生SH,SP,RS,SP,φ1,φ2驱动脉冲,用于驱动TCD1501的的源代码(To generate SH, SP, RS, SP, φ1, φ2 drive pulse for driving TCD1501 source code)
- 2013-05-15 20:50:30下载
- 积分:1
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FIFO的Verilog程序 已在modelsim中编译通过 并且可以通过DC进行综合...
FIFO的Verilog程序 已在modelsim中编译通过 并且可以通过DC进行综合-FIFO procedures have been in the Verilog in ModelSim compiler and can be passed through the integrated DC
- 2022-03-13 00:38:40下载
- 积分:1
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ise9.1
学习ISE的好资料,想要使用XILINX芯片进行开发必看(ISE learning good information, want to use a must-see XILINX chip development)
- 2009-05-15 09:04:15下载
- 积分:1
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hanming
Verilog HDL语言编写的汉明编码及解码器,附有时序仿真文件(Verilog HDL language encoding and decoding Hamming, with timing simulation file)
- 2017-06-22 15:56:38下载
- 积分:1
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键盘输入串口输出显示字符,通过串口显示键盘输入的字符
键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters
- 2022-04-13 11:20:18下载
- 积分:1
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第七次课--视频图像DCT处理及水印嵌入_2
说明: 熟悉IIC协议总线协议,采用IIC总线对图像采集传感器寄存器进行配置,并转换为RGB565格式。
利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。
利用 SDRAM 接口模块的设计,实现了刷新、读写等操作;为提高SDRAM 的读写带宽,均采用突发连续读写数据方式;并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。
利用双线性插值方法实现对图像640×480到1024×768的放大操作。
完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format.
Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface.
With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA.
The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768.
Complete the VGA display interface design.)
- 2020-06-25 04:00:02下载
- 积分:1
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count4
这是一个基于Quartus2 开发环境的4输入加法器( 4adder basic on Quartus2)
- 2013-08-04 09:45:07下载
- 积分:1
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verilog
关于USB开发的verilog开发程序,非常的全面,学习FPGA开发时用得着。(About USB development verilog development process, very comprehensive, learning FPGA development time worthwhile.)
- 2013-12-26 18:29:35下载
- 积分:1
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flash_test_24
实现fpga 读写flash 在k7上验证(Realization of FPGA read-write flash verification on K7)
- 2020-06-18 20:00:02下载
- 积分:1
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code
直接序列扩频通信(主要包括BPSK调制和BPSK解调以及PN码的产生)(Direct sequence spread spectrum communication (including BPSK BPSK modulation and demodulation, and the PN code generation))
- 2013-05-31 14:04:09下载
- 积分:1