VHDL学习总结，简要概括了VHDL，非常适合做学习的总结

ISE7.1i 中文教程 适合xilinx的FPGA/CPLD用户-Chinese ISE7.1i the xilinx tutorial for FPGA/CPLD users

时间同步后即可确定每帧数据的起始位置，这样就能完整的截取下每一帧。但是，数据中还带有频偏信息。在常规的通信系统中，多普勒很小仅仅会带来很小的频偏，但是在大多普勒的情况下，频偏将非常大，20马赫的速度将会带来将近34K的频偏。因此，如何很好的纠正频偏即为本系统的难点。 OFDM中，我们将大于子载波间隔倍数的频偏称为整数倍频偏，而将小于一个子载波间隔的频偏称为小数倍频偏。频偏矫正精度只要能保证小于十分之一倍的子载波间隔，频偏就不会对均衡和解调造成影响。本文中我们借鉴这种思想，由于硬件资源限制，我们将在接收端做64点FFT，即相当于将频域划分为64份，我们将小于 的频偏称为小数倍频偏，将 整数倍的频偏称为整数倍频偏。本程序即基于SCHIMDL经典方法完成小数倍频偏纠正(After time synchronization can determine the starting position of each frame data, so you can complete the interception of each frame. However, in the data with frequency information. In conventional communication systems, doppler small will bring only small deviation, but in the case of most of the doppler, frequency PianJiang is very large, 20 Mach speed will lead to deviation of nearly 34 k. Therefore, how to good to correct deviation is the difficulty of this system. OFDM, we will be bigger than the sub-carrier spacing ratio of frequency deviation is called the integer frequency offset, and the interval will be less than a child carrier frequency offset is called decimal frequency doubling. Deviation is less than one over ten times as long as can guarantee accuracy of sub-carrier spacing, deviation will not affect balance and demodulation. This article, we draw lessons from the idea, due to the limited hardware resources, we will do 64 points FFT at the receiving end, which is equ)

SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps

VHDL版的C51核(MC8051)-VHDL version of the C51 core (MC8051)

RSA密码芯片的FPGA实现[1].part1.rar RSA密码芯片的FPGA实现[1].part1.rar-RSA password chip FPGA realization of [1]. Part1.rarRSA password chip FPGA realization of [1]. Part1.rar

第十一章到第十三章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。(Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.)

SPI接口协议，将spi总线转换成为LOCALBUS总线(SPI interface protocol, the spi bus converted into LOCAL BUS bus)

vmm primer的使用使用文档，和之前vmm primer源代码配套使用！(vmm the primer use of the use of the document, and before supporting vmm the primer the source code to use!)

硬件描述语言,verilog HDL,实现了解码器的设计-hardware description language, verilog HDL, the decoding of Design

*** ***OC_I2C_Master使用说明*** ***** 使用步骤：1.将OC_I2C_Master文件夹拷贝到安装盘alterakits ios2components目录下。 之后重新打开SOPC Builder，在可用元件列表的DeviceSOPC组中将出现OC_I2C_Master 元件，即可像其它Altera外设元件一样添加和使用。 2.hdl文件夹中包含有描述i2c逻辑的硬件描述文件，不能删除。 3.HAL文件夹包含硬件抽象层所需的文件（即驱动），不能删除。 4.inc文件夹包含有定义底层硬件的C语言头文件，不能删除. 5.I2C_doc文件夹下有关于该元件的开发文档。-********* OC_I2C_Master use*********** use these steps: 1. OC_I2C_Master folder will be copied to the installation disk alterakits ios2components directory. Re-open after the SOPC Builder, a list of available devices will appear DeviceSOPC Group OC_I2C_Master components, can be similar to other peripheral devices like Altera add and use. 2.hdl folder contains logical description i2c hardware description files, can not be deleted. 3.HAL folder contains the necessary hardware abstraction layer file (ie drivers), can not be deleted. 4.inc folder contains the definition of the underlying hardware C language header files, should not delete. 5.I2C_doc folder on the developmen