VHDL学习总结，简要概括了VHDL，非常适合做学习的总结

BT656转RGB的算法实现代码，使用VORILOG语言编写(BT656-->RGB, verilog)

9对于输入密码锁的键，假设复位后七个灯显示" 0"，使用sw1、sw2、sw3、sw4 4，只需按下并松开任意sw1、sw2键，使七个灯显示值加" 1"，只要按下并松开任意sw3、sw4，将使七个灯显示值加" 2"

基于VHDL的电子秒表的设计，使用VHDL语言描述一个秒表电路，利用QuantusII软件进行源程序设计，编译，仿真，最后形成下载文件下载至装有FPGA芯片的实验箱，进行硬件测试，要求实现秒表功能。(Design of electronic stopwatch based on VHDL)

用vhdl做的计算机组成原理课程设计的资料，实现加法运算，进行求和，仿真实例等资料！-Vhdl to do with the computer information on the composition of curriculum design principles to achieve the addition operation, a sum, simulation examples, etc.!

这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

xilinx Spartan 6 PCIE仿真教程，PIO方式，带有TLP包分析。(XILINX PCIE tutorial device spartan6 PCIE core version V2.4)

串行加法器的vhdl描述，用两个移位寄存器和一个全加器，一个d触发器实现(The VHDL description of the serial adder, with two shift registers and a full adder, a D trigger)

基4FFT原理及MATLAB实现，基本原理，编程思想等(base——4 FFT principle and MATLAB implementation, the basic principles of programming ideas, etc.)

Quartus II 7.2最完美的license破解器!(Quartus II 7.2 FULL and perfect License!)

用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in