通过实例的VHDL程序设计

verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用(verilog code for serial port transmit and receive code, with source code and test files, and accurate available)

文章详细讲述了sdr_sdram控制器的使用和编程思想(sdr_sdram)

program in hdl that this open mind in digital resources

浙江大学体系结构实验代码 实现流水线的forwarding(Architecture, Zhejiang University Experimental code pipeline forwarding)

Vhdl Golden Reference Guide.pdf

本文件是用CPLD（EPM7064）驱动线阵CCD（ILX509），其中包括原理图和程序-This document is a CPLD (EPM7064) driver line array CCD (ILX509), including schematics and procedures

电路酒窖杂志的vhdl示例。vga控制器、视频发生器等PS2鼠标vhdl

假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

它是一个8051 VHDL源代码发布的原创。

这个是用verilog语言编写的基于FPGA的交通灯控制器，分别控制四个方向上的交通灯的通断-The verilog language is FPGA-based traffic light controller, respectively, the four direction control of traffic lights-off