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COSTAS_LOOP
用verilog编写的科斯塔斯环,希望有帮助(Costas loop written in verilog helpful)
- 2012-10-31 23:01:23下载
- 积分:1
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FULL-FPGA-SCH
包括Cyclone II EP2C20 原理图.CycloneII开发板原理图fpga.EP1C3T144 FPGA develop board manual.EP1C6Q240C6开发板原理图.EP2C8开发板原理图.EPM1270F256C5 MAX_II_board_schematics.SF-EP1V2+FPGA开发板原理图.XC3S400红色飓风开发板原理图.红色飓风II代开发板原理图2.(Including the Cyclone II EP2C20 schematic . CycloneII development board schematics fpga.EP1C3T144FPGA develop board manual.EP1C6Q240C6 development board schematic . EP2C8development board schematics . EPM1270F256C5MAX_II_board_schematics.SF-EP1V2+FPGA development board schematic . XC3S400red hurricane development board schematics. Red hurricane II development board schematic diagram2)
- 2012-04-28 15:47:07下载
- 积分:1
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The use of Altera' s FPGA
使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制,并显示在一个8段式数码管上。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.
- 2022-09-23 11:15:03下载
- 积分:1
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时序逻辑与组合逻辑(VHDL)
代码使用应用于 FPGA的VHDL代码,主要是告诉大家时序逻辑和组合逻辑的应用场合和区别,希望能够对大家有所帮助
- 2022-10-19 04:15:03下载
- 积分:1
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Sequence Detection VHDL source code, ATERA platform compile. Report detailed des...
序列检测VHDL源代码,ATERA平台编译。详细的报表说明和模拟源代码。
- 2022-10-18 04:30:03下载
- 积分:1
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can_controller
基于FPGA的VHDL,can总线控制的设计与实现,在ISE下弄的。(FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.)
- 2011-05-05 23:32:25下载
- 积分:1
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数字频率计(试验报告)适合初学者参考
数字频率计(试验报告)适合初学者参考-Digtal Frequency Test(experiment report)
suit Raw recruit reference
- 2022-11-18 17:35:04下载
- 积分:1
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I2C
说明: 一种能简单的实现I2C通讯的代码,对于主机和从机之间的通讯讲解的很清楚。(A Code for I2C Communication)
- 2020-06-18 23:20:02下载
- 积分:1
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移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件
移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件-displacement add hardware multiplier, based on FPGA VHDL prepared, containing all the documents
- 2022-06-19 21:07:11下载
- 积分:1
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占空比1:1的通用分频模块
占空比1:1的通用分频模块-1:1 generic-frequency module
- 2022-11-11 08:45:03下载
- 积分:1