VHDL prepared by the FIR filter source for Embedded designers have a good role i...

实现dds功能，利用quartus软件， 子模块包括加法器，锁相环，date-rom 利用原图将各模块综合，利用ps2键盘控制频率及相位。-Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.

FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)

说明：  将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)

Syplify经典英文教程。内含众多实验例程，Lab 1 Basic Synplify Run；Lab 2 Analyzing Critical Path and Assigning Timing；Lab 3 FSM (Finite State Machine) Compiler Constraints and Attributes(Syplify classic English tutorial. Contains numerous experiments routine, you can help learners to quickly grasp Syplify tips, is a rare foreign experiments tutorial.)

一个LED大屏幕接收卡的完整设计工程,有需要学习LED大屏幕控制的朋友可以参考

VGA图象显示控制器设计,实现在VGA显示器上显示图象.-VGA image display controller designed to achieve the VGA display shows images.

8位7段LED显示源码，扫描显示，稳定高效-seven of the eight LED source, scanning, stable and efficient

系统介绍EDA技术的发展概述，相关概念，VHDL语言、MAX+PULS、QUARTUS的设计方法。-System overview of the development of EDA technology, related concepts, VHDL language, MAX+ PULS, QUARTUS design method.

systemc实现的一个fifo，对想要学习systemc的同学很有帮助哦(A fifo systemc achieved, the students want to learn systemc helpful oh)

至于FSK调制原理就不多说了，这里做的一个实验是二进制频移键控。发送一组码元，通过响应的键控电路监测是发1还是发0然后选择频率控制正余弦电路波形。-see