FPGA数字AGC(帮同学做的毕业设计)

通过UART在FPGA数码管上显示经纬度坐标的代码(By UART displayed on FPGA digital latitude and longitude coordinates of the code)

altera的ip核，在sopcbuilder中添加后，在niosII IDE中可以用一条语句实现，音频解码的输出。-altera

xilinx spartan6的pcie pio源代码(xilinx spartan6 pcie pio demo)

xc3s400芯片详细的英文资料，xc3s400的FPGA开发板使用者必看-chip xc3s400 detailed information in English, xc3s400 the FPGA development board users see

Use verilog language design DIGITAL-PID source

此为数学形态滤波器消燥的代码，用于一维信号，涉及一个具体的例子，需要的话可以自己修改，修改相应的结构元素。(This is a mathematical morphology filter away dry code, used to one dimensional signal, involving a concrete example, necessary can change ourselves, change the structure of the corresponding elements)

一个用verilog实现的五子棋程序，用在fpga上，连接显示器，可选择与电脑对战或是双人对战，按wsad控制方向，回车控制落子，程序会自动判断输赢并显示结果(A 331 procedures implemented by verilog, used in fpga, connect the monitor, you can choose to play against the computer or a double play, press wsad control the direction, carriage control Lazi, the program will automatically determine the winners and losers and display the results)

thesis about design and implementation neural network using FPGA

Altium Reference design for LMH0340 test bed and design

说明：  基于labVIEW，控制电机等工作实例，程序基本完整(Based on labVIEW, control motor and other working cases, the program is basically complete)