proficient VerilogHDL : IC design example explanation of the core technology

RS编码器在fpga上的实现，用的modelsim开发环境(RS encoder in the realization of the fpga, development environment used in modelsim)

verilog2000更新部分，请对照前一个标准。加入了一些新的支持-verilog2000 update, a former control standards. The inclusion of some new support

max_plus开发的 有max_plus就可以直接运行的交通灯制作 用vhdl语言编写的-max_plus development of max_plus can direct the operation of traffic lights produced by VHDL language

本文为verilog的源代码-In this paper, the source code for Verilog

这是一个LCD1602底层驱动代码，TI公司LM3S系列的(This is a LCD1602 underlying driver code, TI company LM3S series)

用verilog语言写的简单的键盘扫描代码，适合初学者，用alter的软件编写的程序代码。(Using verilog language to write simple keyboard scan code, suitable for beginners, with alter software program written code.)

说明：  acousting fingerprint enhancement

说明：  载波同步是QPSK信号相干解调的一项关键技术。(Carrier synchronization signal coherent QPSK demodulation is a key technology.)

viterbi译码器的IP核，可以直接编译使用-viterbi decoder IP core, the compiler can directly use

VLSI Implementation IEEE Papers 2010 to 2014