收集了目前关于FPGA设计的论坛，大家如果有什么疑问，可以到这些论坛上求助。...

有用的数字钟设计文档，有秒表、闹钟等模块，希望对大家有用！(JUST LEARN FROM IT!!ENJOY!)

假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

实现一个循环冗余码,是老师给的例子，别的同学已经验证-a cycle ruduandency code

对于已获得的脉冲包络采样序列，需测量的脉冲特征参数主要有：脉冲幅值(PA)、脉冲到达时间(TOA)和脉冲宽度(PW)。实际测量中，脉冲波形的形状是各种各样的，但其主要的参数有脉冲幅度、脉冲宽度、脉冲周期、脉冲占空比、脉冲前沿(上升时间)、脉冲后沿(下降时间)、脉冲上冲、脉冲下冲、脉冲下垂、脉冲顶部不平度等，脉冲参数的计量主要就是对这些参数进行计量。本程序包实现基于FPGA实现脉冲宽度和重复周期的测量。(Who have access to the pulse envelope sample sequence, the pulse measurement to be the main characteristic parameters are: pulse amplitude (PA), pulse time of arrival (TOA) and pulse width (PW). The actual measurement, the pulse shape is a wide variety of shapes, but its main parameters of the pulse amplitude, pulse width, pulse period, pulse duty cycle, pulse leading edge (rise time), pulse along (down time), the red pulse, pulse undershoot, pulse droop, pulse irregularities, such as at the top, the measurement of pulse parameters is mainly the measurement of these parameters. The package FPGA-based pulse width and repetition to achieve the measurement cycle.)

交通灯控制器，verilog，可控制两个方向各四盏灯的亮灭，并具有时间显示(traffic light controllor，by verilog)

基于ISP的交通灯设计，实现了各路状态转换、警察控制、行人请求功能。(ISP traffic light design, to achieve the brightest state transitions, police control, pedestrian request feature.)

步进电机定位控制系统，VHDL程序，里面有注释(Stepper motor position control system, VHDL program, there are comments)

This is the Spartan 3E tutorial_02.

Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double precision multiplier is implemented on a Virtex 6 FPGA. In addition, the proposed design is compliant with IEEE 754 format and handles over flow, under flow, rounding and various exception conditions. The design achieved the operating frequency of 414.714 MHz with an area of 648 slices.