VLSI implementation of high speed and high resolution FFT algorithm based on Rad...

JOP的内核文件，这是核心的核心，中文资料基本找不到-JOP kernel, which is the core of the core, the Chinese can not find basic information

FSK编码器和译码器,有需要的朋友可以看看！(FSK encoder and decoder, there is a need friends can see!)

FPGA Verilog HDL模拟IIC通讯接口-FPGA Verilog HDL IIC Interface

关于Digilent Atlys Spartan-6 FPGA development board　audio ac97的讲解及具体应用的源码(Digilent Atlys Spartan-6 FPGA development board audio of ac97' s presentation as well as the specific application' s source code)

155B航空总线中曼彻斯特编码和译码模块，亲测可以使用，而且很好用，但是对锁相环的描述不是很仔细(155B Air bus Manchester encoding and decoding modules, pro-test can be used, and it just works)

使用verilog hdl语言编程正弦波信号，能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results )

用VHDL语言编写的LED显示器驱动电路的设计源程序-using VHDL prepared by the LED display driver circuit design source

nios processor example 1

VHDL学习手册-VHDL study manual

Wishbone dma ip core