Verilog很不错的进阶书!看完后对数字模拟集成电路设计有个深入的认识!...

文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和 设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and Design of high resolution, high stability function of the signal )

在一些系统中，经常用到对触发信号延时一段时 间后，再对某些目标信号进行采集，通常这段延时要求 非常精确，还要做到范围可调，一般这种延时的最小时 间单位小于100ns。如果选用普通微控制器，延时系统的操作界面比较容易实现，但是靠软件延时得到结果的准确性较低。考虑到芯片功能、开发环境以及接口方便等问题，最终选用一片常用的AlteraSVCPLD EPM7128SLC3411]作为系统的核心控制部分，来实现 信号延时、输人设定、运行显示的功能。应用Veril- o苦2〕语言，在Altera的Quartus11WebEditio详3〕软件 环境下进行编程仿真，最后烧写芯片进行系统硬件测试 -err

NIOS II IDE 编程， FLASH测试程序，仅供参考。-NIOS II programming IDE, FLASH testing procedures, for information purposes only.

VHDL Bible. It is a must read for any front end vlsi designer.

单片机与ＦＰＧＡ的通信　 功能 :单片机控制写FPGA一字节数据 单片机控制写FPGA一字节数据时钟 (注意读写数据端口可复用,也可分用) 单片机控制发送数据端口 -MCU and FPGA communication functions: SCM control FPGA to write a byte of data SCM control FPGA to write a byte of data clock (Note that the read and write data ports can be re-used, but also can be divided into use) SCM control to send data port

平坦度检测中的高度检测算法，使用ISE开发环境，语言为VHDL，平台是XC3S4-a vhdl_program used for flat detect

BUS documentation and map reffereces

汉明码转换，在FPGA上用verilog实现(hamming encoder, using FPGA)

数字波形存储器VHDL源码，基于Quartus II开发。-Digital waveform memory VHDL source code, based on the Quartus II development.

LPC4357开发板采用ARM的Cortex-M4微控制器LPC4357。内置一个ARM Cortex-M0协处理，CPU运行频率高达204MHz，片内集成1MB Flash和36KB SRAM。开发板采用独立核心板设计，核心板集成64MB SDRAM、128MB NAND-Flash、4MB SPI-Flash。核心板上的摄像头接口可直接连接各种型号的摄像头，两侧160P排针接口引出了除EMC总线外的LPC4357芯片所有功能管脚。 开发板提供丰富的外设接口，包括以太网、液晶屏、摄像头、USB-Host、USB-OTG、SD卡、RS232、RS485、CAN、耳机、麦克风、温度传感器、AD/DA、JTAG仿真器等。此外，开发板提供一个14P扩展接口，包括1路UART、1路SPI、1路I2C、4个IO、3.3V、5V，可以很方便的扩展自己的外围电路。(DS-LPC4357 development board using the Cortex-M4 microcontroller LPC4357 ARM s. A built-in ARM Cortex-M0 co-processor, CPU operating frequency up to 204MHz, 1MB Flash and 136KB SRAM integrated on chip. Development board using an independent core board design, the core board integrates 64MB SDRAM, 128MB NAND-Flash, 4MB SPI-Flash. Camera core board interface can be directly connected to various types of cameras, both sides 160P pin interface leads to the outside of the bus in addition to EMC LPC4357 chip all the functions of the pins. Development board provides a rich set of peripheral interfaces, including Ethernet, LCD screen, camera, USB-Host, USB-OTG, SD card, RS232, RS485, CAN, headphone, microphone, temperature sensor, AD/DA, JTAG emulator, etc. . In addition, the development board provides a 14P expansion interfaces, including one-way UART, 1 road SPI, 1 channel I2C, 4 个 IO, 3.3V, 5V, can easily expand their peripheral circuits.)