FFT processor design and applied research, suitable for signal processing fpga t...

DLX CPU VHDL CODE UNIVERSITY

单相数字锁相环 鉴相器 环路滤波器 数控振荡器(Single-phase digital phase-locked loop phase detector loop filter numerically controlled oscillator)

Verilog 编写的IP核，512K的16位SRAM-Written in Verilog IP core, 512K 16-bit SRAM

在matlab仿真的基础上，用maxplus2实现等波纹法的程序代码(In matlab simulation, based on the use of such corrugated maxplus2 realize law code)

RS（255，223）编码器，已实际运用到产品中(RS (255,223) encoder has actually applied to products)

VHDL编写的4个led灯循环明暗变化，通过改变波形占空比实现，课堂作业自编程序-VHDL prepared by the four led lights cycle shading changes, by changing the waveform duty cycle to achieve, self-compiled class operating procedures

基于FPGA的pci总线接口设计。。。。。。。。。。。。。(FPGA-based PCI bus interface design)

说明：  将外部的输入的6Mhz的信号分成为频率为153600hz的信号(The external input signal divided into 6Mhz 153600hz signal frequency)

说明：  经典的雷鸟车灯控制电路设计，各大高校实验必做题目(Thunderbird classic light control circuit design, major colleges and universities must do experimental subjects)

通信控制中常用的脉冲宽度检测程序，VHDL模块化编成实现（原创）(communication control used in pulse width detection procedures, VHDL modular organization to achieve (original))