FFT processor design and applied research, suitable for signal processing fpga t...

这个

在FPGA硬件上，使用verilog语言编写的一个乘累加器程序。(FPGA hardware, a multiply accumulator verilog language program.)

verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用(verilog code for serial port transmit and receive code, with source code and test files, and accurate available)

自动售货机，根据所要的东西，自动收费，并进行找零(Vending machine, according to what you want to automatically charge and conduct Keep the change)

直接序列扩频通信（主要包括BPSK调制和BPSK解调以及PN码的产生）(Direct sequence spread spectrum communication (including BPSK BPSK modulation and demodulation, and the PN code generation))

包含32为乘法器的设计，用verilog语言实现，包括booth编码的实现，booth乘法器的实现，3_2压缩器的实现，4_2压缩器的实现，华伦斯树的实现，以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)

dual port ram control (dual port ram control dual port ram control dual port ram control)

verilog alu 8bit for engineers

可综合的vhdl设计特点.pdf-synthesizable VHDL design features. Pdf

测试过可用的SD仿真模型，VERILOG语言(SD card simulation modle, test OK)