FFT processor design and applied research, suitable for signal processing fpga t...

描述了使用FPGA接口PDIUSBD12开发USB接口的流程.-Describes the use of FPGA Interface USB interface PDIUSBD12 development flow.

程序来自《现代通信系统－使用matlab》英文版 已经调通！并加上了注释。 希望对大家有帮助4(fpga)

国外的VHDL应用例子，大家可一好好参考一下！-abroad VHDL Application examples, we can make reference to a properly!

基于diligent公司的basys2开发板的四位有符号二进制数的除法

stbc空时编码源码，非常好的程序。verilog程序-STBC Space-Time Coding Source, very good program. Verilog program

这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章，实用性很强的，在这里也感谢这篇文章的作着-This is a description language with verilog viterbi decoding and rake receiver of the article, very practical, here are grateful for this article was

这是我的VHDL格式的电子密码锁源程序，请站长审核啊-This is my VHDL source code format of the electronic lock, please review ah owners

说明：  ADDER USING VERILOG ADDER WITH VERILOG VERILOG ADDER

一个AD9226芯片的驱动，用FPGA写的。虽然简单，但是希望对各位有帮助(An AD9226 chip driver, FPGA written. Though simple, but I hope you will help)

用vhdl描写的通用异步改进dram控制器，经过编译器综合和仿真测试，符合设计要求。-Using VHDL description Universal Asynchronous improved dram controller, through an integrated compiler and simulation testing, in line with the design requirements.