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MAX48_cn
MAX481、MAX483、MAX485、MAX487-MAX491以及
MAX1487是用于RS-485与RS-422通信的低功耗收发器,
每个器件中都具有一个驱动器和一个接收器(The MAX481, MAX483, MAX485 The MAX487-MAX491, and MAX1487 low-power transceivers for RS-485 and RS-422 communication, each device has a drive and a receiver)
- 2012-07-10 21:28:46下载
- 积分:1
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ModelSim-gaojishiyong--Camp
FPGA开发仿真工具modelsim的高级进阶教程,包括如何写脚本文件和后台批处理文件(FPGA Development Advanced simulation tools modelsim tutorial, including how to write a script file and back-office batch file)
- 2012-05-09 23:52:21下载
- 积分:1
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Verilog语法
Verilog语法教程,适合初学者,详细(Verilog instruction book)
- 2019-05-04 16:07:18下载
- 积分:1
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在VHDL上编写了UART通信协议,对于FPGA开发有很大帮助...
在VHDL上编写了UART通信协议,对于FPGA开发有很大帮助-In VHDL on the preparation of a UART communication protocol, for FPGA development of great help
- 2022-01-25 23:42:19下载
- 积分:1
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disparity
Disparity mapp code in VHDL
- 2017-11-30 14:48:59下载
- 积分:1
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使用Virtex-5 FPGA高级加密标准算法的高效实现
应用背景在本文中,一个高性能和高度优化Rijndael AES算法的硬件实现了设计并实现Xilinx Virtex-5 xc5vlx50FPGA器件。设计采用模块化利用VHDL语言的方法。设计工作正确如图所示。这个所提出的设计的性能进行评估的基础上吞吐量和面积。我们的设计利用了速度339.087兆赫,这意味着吞吐量4.34用399片Virtex-5 FPGA面积Gbps。关键技术本文提出了一种有效的Rijndael算法的硬件实现高级加密标准(AES)加密算法采用最先进的现场可编程门阵列(FPGA)。在非常高速集成电路设计的设计硬件描述语言(VHDL)。时序仿真进行验证所设计的电路的功能。性能评估也做了吞吐量和区域。在国家的最先进的Xilinx Virtex-5实现设计(xc5vlx50ffg676-3)FPGA实现吞吐量4.34千兆位/秒,总共使用了399片。
- 2022-02-20 11:10:20下载
- 积分:1
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一个用vhdl硬件描述语言实现的一个比较简单的除法器
一个用vhdl硬件描述语言实现的一个比较简单的除法器-an divider using vhdl
- 2022-05-15 11:56:12下载
- 积分:1
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同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。
系统以同步信号开始连续发...
同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。
系统以同步信号开始连续发送四个字节,在发送中出现5个1时插入一个0,在四个数据发送结束而下一次同步没有开始之前,发送7FH,这时中间不需要插入零
-synchronous serial data transmission circuit SSDT the basic function is to convert parallel data into serial and the same this step. System write and read sequential fully compatible Intel8086 timing. Synchronized signal system to start sending four consecutive bytes, in this emerging 5 1:00 insert a 0, at the end of four data sent and the next synchronization not started before, sending seven FH, then the middle is not inserted
- 2023-05-29 03:45:03下载
- 积分:1
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1 前大灯可以随意打开和关闭;
2 当汽车左转弯的时候,前左转向灯闪烁,同时左后灯的3盏灯由右往左闪烁;
3 当汽车有转弯的时候,前右转向灯闪烁,同时右...
1 前大灯可以随意打开和关闭;
2 当汽车左转弯的时候,前左转向灯闪烁,同时左后灯的3盏灯由右往左闪烁;
3 当汽车有转弯的时候,前右转向灯闪烁,同时右后灯的3盏灯有左往右闪烁;
4 当汽车减速或紧急刹车的时候,左后灯和右后等同时闪烁;
5 当汽车在左转弯的同时减速,则前左转向灯闪烁,左后灯的3盏灯由右往左闪烁,同时右后灯都点亮。
6 当汽车在左转弯的同时减速,则前右转向灯闪烁,右后灯的3盏灯有左往右闪烁,同时左后灯都点亮。
-a former headlamps can be opened and closed at will; 2 when the vehicle made a left turn when the former left to lights flickered. Left lights while the three lights flashing from right-go left; 3 when the vehicle is making a turn when a right turn to the former lights flickered. Right after the lights while the three lights are blinking right and left; 4 when the vehicle deceleration or when the emergency brake, Left and right after the lights blink, and so on; 5 when the vehicle made a left turn at the same time to slow down, and then to the left before the lights flickered. Left lights three lights flashing from right-go left, right after the lights are lit. 6 when a car made a left turn at the same time to slow down, and then right before the lights to flick
- 2022-03-04 04:27:43下载
- 积分:1
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VHDL 快速参考手册,简要概括了VHDL,非常适合做开发参考
VHDL 快速参考手册,简要概括了VHDL,非常适合做开发参考-VHDL Quick Reference Guide, a brief summary of VHDL, is well suited to do the development of reference
- 2022-06-13 15:47:21下载
- 积分:1