picoblaze实现串口通信...难道一定要20个字吗?

基于fpga的位同步信号提取仿真 使用vhdl语言 quartus(To use vhdl language quartus fpga bit synchronization signal extraction-based simulation)

通过EMIF连接fpga与dsp的代码-Through the EMIF connection FPGA code with dsp

控制8个发光二极管中的一个发光二极管发光，其它7个发光二极管都出于截止状态，发光二极管的导通顺序按照向左或向右两个方向移动，并且通过按键控制发光二极管循环发光移动的方向。(Control of a light-emitting diode light-emitting eight light-emitting diodes, the other seven light-emitting diodes for the cut-off state, light-emitting diode conduction order in accordance with the left or right move in both directions, and light-emitting diode cycle luminous button control mobile direction.)

模拟SDH帧结构，设计了状态机，能从连续传输的SDH字节流中找出帧头；从SDH字节流中，提取E2字节，并按照64K速率分别串行输出E2码流及时钟；设计了输入信号，输出包括E2串行数据、E2串行时钟和SDH帧头位置指示

fsk调制与解调，此程序经过验证，可以运用，通讯方面的同学可以用-FSK modulation and demodulation, this procedure has been verified and can use communications students can use

实现fpga 读写flash 在k7上验证(Realization of FPGA read-write flash verification on K7)

mux one hwich is teh best knwo progerma i n the workdl and ist is the

fpga VHDL语言，控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS

TMS320C6678 EVM TMS320C6678 EVM GOOD(TMS320C6678 EVM GOOD TMS320C6678 EVM GOOD)

8级cordic 算法verilog (8 cordic algorithm verilog)