使用VHDL实现三角函数的计算

verilog实现的“六进制约翰逊计数器”。(verilog implementation of the " six hexadecimal Johnson counters." )

使用VHDL键盘扫描程序，可以稍微修改一下使用

3 Digit BCD to 7 segment indicator decoder

基于VHDL语言的设计8位CISC微处理器实例-VHDL design language based on 8-bit CISC microprocessor examples

单相混合有源电力滤波器的设计与控制，在matlab中的仿真模型，功能效果很好。(The design and control of single-phase hybrid active power filter in matlab simulation model, the function works well.)

VHDL_COUNTING 0_9_LED 7 段 (ĐẾM 0 ĐẾN 9 HIỂN THỊ LED 7 ĐOẠN BẰNG NGÔN NGỮ VHDL)

EP2C35A实验箱基于NIOSII的串行AD_DA编程(EP2C35A experimental box based NIOSII the serial AD_DA programming)

Vhdl design z80 for altera users

Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.

FPGA入门点亮一个LED灯，作为FPGA入门级程序(FPGA is)