基于vhdl的dds设计

本系统用于GPS中频部分的窄带滤波（AD后的数据经过LMS滤波后去掉窄带干扰，可以抑制20dB以上的干扰）(this system can be imply to anti-narrowband-jamming for GPS IF signal, it can degrade 20dB narrowband jamming)

基于VHDL语言的CORDIC算法实现，用于计算sin(x),cos(x)等，实测可用(Based on VHDL CORDIC algorithm, used to calculate sin (x), cos (x), etc., the measured available)

一个关于降低现代通信系统中高峰均比信号的matlab算法，对于研究数字预失真基于FPGA实现的有一定作用！(A modern communication system on the lower than the peak signal matlab algorithm for FPGA-based study of digital pre-distortion to achieve a certain effect! )

64-point FFT/IFFT processor architecture : Rrdix-SDF

基于Verilog的图像采集、处理和存储程序，初学者参考，高手绕道。(Verilog-based image acquisition, processing and storage procedures, beginners reference, master bypass.)

说明：  VIVADO HLS IMAGE 使用文档(vivado image processing example text of zynq)

A VANET research program

用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错，然后将其纠错译码并输出，详细过程见仿真。(Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and then error correction decoding and output, see the detailed process simulation.)

说明：  用于读取海德汉绝对位置编码器的位置数据。ENDAT2.1接口(Read the data from ENDAT2.1)

is61lv25616简单的verilog程序，完成sram读写 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动(1lv25616 simple verilog program, complete sram read and w1lv25616 simple verilog program, complete sram read)