四位乘法器的VHDL源程序

c54x的VeriLog程序代码 也是opencoreip-C54x is the Verilog code opencoreip

fpga实现ddr数据收发测试，完整的工程，下载解压后，即可正确运行，已多次验证无误(FPGA DDR data receive and receive test, complete engineering, download and unzip, can run correctly, has been verified many times)

说明：  verilog标准语法，还有很多的样例参考，学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)

适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT

用VHDL编写的8259控制,供大家使用.-with VHDL control of the preparation of the 8259, for your use.

SDRAM驱动器，自己项目利用的，已经经过实际验证(sdram controller)

十字路口交通灯的单片机控制源代码 红黄绿三灯 还有数码管时间显示(Intersection traffic lights SCM source code red yellow three lights and LED time display)

verilog hdl coding DDR sdram control for fpga -verilog hdl coding DDR sdram control for fpga

说明：  用于FPGA的I2S接收模块，仅供学习和参考(audio-i2s receive.use fpga.)

ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA