在QuartusII下进行编译和仿真的时候,会出现一堆warning,有的可以忽略,有的却需要注意...

数字式移相信号发生器可以产生预置频率的正弦信号，也可产生预置相位差的两路同频正弦信号，并能显示预置频率或相位差值；-digital phase shifting generator can produce preset frequency sinusoidal signal, Preferences may also have phase difference with the way the two-frequency sinusoidal signal, and can show that the preset frequency or phase difference value;

verilog lcd2864 适合初学者(verilog lcd2864 )

DSP 程序的测试 很有用的 仪器上面用的-DSP testing procedures very useful in the above apparatus

SAA7113 ＦＰＧＡ开发实例，非常经典(The SAA7113 FPGA development examples, very classic)

mdio配置BCM5461，实现PHY初始化及通信相关寄存器的配置(mdio configure PHY)

用硬件描述语言编程实现减法器,实现两个操作数的减法-Using hardware description language programming subtraction, and the achievement of the two operands of the subtraction

source code for Ethernet logic

一种RISC结构8位微控制器的设计与实现-The structure of a RISC micro-controller" s 8 Design and Implementation

使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。(Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has some value engineering practice.)

固定的 128 点复杂 FFT 或 64/8/16 点