在QuartusII下进行编译和仿真的时候,会出现一堆warning,有的可以忽略,有的却需要注意...

一个NiosII可用的LCD12864 IPcore，含例子-A NiosII available LCD12864 IPcore, with examples

最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)

用VHDL语言在CPLD上实现串行通信-using VHDL on the CPLD Serial Communication

本程序实现任意占空比产生，已经在easyfpga030综合过-This procedure generated to achieve an arbitrary duty cycle

moving tracking based in D5M camera tracking camera

QAM调制，解调matlab代码，包含BPSK，QPSK,16QAM,64QAM,256QAM,1024QAM,4096QAM。其中调制方式。代码通过验证。(QAM modulator,demodulator)

fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim

说明：  32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考(32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only)

简易函数发生器，能产生正弦波，三角波，梯形波，方波，并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)

altera DDR3 逻辑测试代码，这是工程实际调试好的代码，保证能用。(altera DDR3 vhdl code)