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HDL编程风格,很有用,希望对大家有所帮助。
HDL编程风格,很有用,希望对大家有所帮助。-HDL programming style, very useful, we want to help.
- 2023-04-10 16:30:03下载
- 积分:1
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regheap
该模块实现一个寄存器堆的操作,其中前16个仅主机能写,规给为32-bit×32。后16个仅Micorblaze能写。读取没有限制。如果双方同时对同一地址进行读写操作,读回的数将是全1。(This module implement a register file of the operation, of which the first host 16 is only able to write rules to the 32-bit × 32. Micorblaze only 16 after the write. There is no limit to read. If the two sides at the same time to read and write operations to the same address, read back would have been a full one.)
- 2009-12-10 15:39:59下载
- 积分:1
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verilog-montgomery-RSA
基于Montgoery 算法的RSA,FPGA verilog 实现,有测试文件(Based on Montgoery algorithm for RSA,FPGA verilog implementation,bench file)
- 2021-04-27 20:28:44下载
- 积分:1
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avnet_edk12_4_xbd_files
安富利SP605开发板ISE12.4版本的XBD文件,里面包括了开发板所有的接口,包括硬件和软件设计(Avnet SP605 development board ISE12.4 version XBD file, which includes the development board all interfaces, including hardware and software design)
- 2014-04-20 21:56:05下载
- 积分:1
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clock18div
Clock Divider, divfactor of 18
- 2015-03-24 18:04:49下载
- 积分:1
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自已写的一个16X16的乘法器,速度比较慢。初学者练习练习!
自已写的一个16X16的乘法器,速度比较慢。初学者练习练习!-own writing an audio Multiplier, speed is relatively slow. Beginners practice practice!
- 2022-07-02 12:25:49下载
- 积分:1
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pl_read_write_ps_ddr
说明: PL 和 PS 的高效交互是 zynq 7000 soc 开发的重中之重,常常需要将 PL 端的大量数据实时送到 PS 端处理,或者将 PS 端处理结果实时送到 PL 端处理,但是各种协议非常麻烦,灵活性也比较差,直接通过 AXI 总线来读写 PS 端 ddr 的数据,这里面涉及到 AXI4 协议,vivado 的 FPGA 调试等。(The efficient interaction between PL and PS is the top priority of zynq 7000 SoC development. We often need to send a large amount of data from PL to PS for real-time processing, or send the processing results from PS to pl for real-time processing. In general, we will think of using DMA for processing, but various protocols are very troublesome and the flexibility is poor. This course explains how to use Axi directly Bus to read and write DDR data of PS terminal, which involves axi4 protocol, FPGA debugging of vivado, etc.)
- 2021-01-22 17:46:44下载
- 积分:1
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4位电子密码锁,带键盘扫描、按键防抖动、LCD驱动编译码
4位电子密码锁,带键盘扫描、按键防抖动、LCD驱动编译码-four electronic password lock with a keyboard scan button shake, LCD driver encryption
- 2022-05-10 17:31:17下载
- 积分:1
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VerilogDHL
VerilogHDL教程,很详细全面的Verilog教程,循序渐进,由浅入深,十分好的学习资料(VerilogHDL tutorial, very detailed and comprehensive Verilog tutorial, step by step, progressive approach, a very good learning materials)
- 2011-07-13 14:19:53下载
- 积分:1
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flv的vhdl教学文件:在线调试
自己慢慢欣赏吧
flv的vhdl教学文件:在线调试
自己慢慢欣赏吧-flv file of VHDL Teaching: Online debug their慢慢欣赏吧
- 2022-05-22 02:55:52下载
- 积分:1