PCI总线仲裁参考设计，Quicklogic提供的verilog代码

FPGA向SRAM中写入数据，VHDL编程-FPGA to the SRAM write data, VHDL programming

verilog HDL语言，对于超大规模集成电路开发学习非常有好处-verilog HDL language, for ultra-large-scale integrated circuits are very beneficial to the development of learning

关于FPGA的书籍，介绍了大量的Verilog实例，对初学者很有帮助-Books on the FPGA, introduced a large number of Verilog examples very helpful for beginners

spartan 3E和verilog HDL的初学者极好的教材，本程序可直接下载到spartan实验板上运行。(Spartan 3E and Verilog HDL beginners excellent materials, the program can be downloaded directly to the spartan experimental board run.)

RobustVerilog生成verilog工具(RobustVerilog version)

this a vhdl code for usb-this is a vhdl code for usb

注意：是verilog语言写的 一bit的全加器，实现4位数的串行加法器，一个时钟能完成一次一bit的全加(Note: It is verilog language to write a bit full adder, to achieve four-digit serial adder, a clock can be completed once a bit full adder)

使用verilog硬件设计语言在FPGA板子上STOPWATCH 秒表设计。(Using verilog hardware design language STOPWATCH stopwatch design on FPGA board.)

generate sine wave. Inputs : Amplitude, phasein, frequency

说明：  Simetrix EMI滤波器设计，实际测试有效果。(Simetrix EMI filter design, the actual test results are effective.)