大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值...

在QuartusII运用ＡＨＤＬ语言，首先设计出PN发生器来产生一个11位的数据流在整个周期内有效数据有 =2047位；再设计状态机用来检测串行数据流中的序列。运用两个个计数器分别对PN码计数以及序列出现的次数计数。改变ＰＮ码结构可以作为通用数列检测器-QuartusII use in AHDL language, the first PN generator designed to generate a data stream 11 throughout the cycle has an effective data = 2047 re-designing the state machine used to detect the serial data stream in sequence. The use of two counters were counting on the PN code, as well as counting the number of sequences occur. Changes in the structure of PN code series can be used as general-purpose detector

verilog产生高斯白噪声，gwn_en信号产生使能，gdata是幅度服从高斯分布，功率谱密度为定值的高斯白噪声序列，共10位（现实中只能够做到带限，跟dac输出带宽有关，我的系统只能做到300kHz）(verilog Gaussian white noise, gwn_en signal enabled, gdata amplitude Gaussian distribution, power spectral density of white Gaussian noise sequence value, a total of 10 (in reality can only be band-limited, with dac output bandwidth related, My system can do 300kHz))

基于stm32开发平台的，模拟ad采样程序设计，可直接下载使用(stm32 zhijiexiazaishiyong)

电梯的设计・用来控制6层的电梯设计原来・VHDL语言-Elevator designed to control the lift design 6 original VHDL language

用verilog写的简单的CPU，有详细注释(Use verilog to write a simple CPU, with detailed notes)

说明：  All AMBA bus protocols - AXI3, AXI4, AXI4-Lite, ACE, AHB

mc8051内核,VHDL程序,内有说明,超详细.-mc8051 kernel, VHDL program, which has made it clear, super-detailed.

NIOSII I2C接口模块及驱动程序，并含有测试程序。对想开发NIOS的工程师很有帮助(NIOSII I2C interface module and driver, and contains the test procedures. NIOS of engineers want to develop useful)

用vhdl 语言实现138译码器，用vhdl 语言实现138译码器，(vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl )