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tcpip_stack_v1_2
说明: 实现ARP、ICMP、UDP、TCP、IP和MAC全过程的传输,对TCP的连接、接收、发送、断开均经过测试,功能正常(Realize the transmission of ARP, ICMP, UDP, TCP, IP and MAC in the whole process, test the connection, reception, transmission and disconnection of TCP, and the function is normal)
- 2020-05-05 10:03:04下载
- 积分:1
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This code for countor . it is design in verilog HDL.
This code for countor . it is design in verilog HDL.
- 2022-07-27 18:33:04下载
- 积分:1
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Verilog-learning-experience
初学学习verilog的经验,可以帮助新手以正确的思维方式,学习方法学习。(Verilog learning experience)
- 2013-09-30 09:51:04下载
- 积分:1
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GCD
Verilog 最大公约数设计RTL级代码和芯片设计图(Verilog GCD Design and synthesis layout )
- 2021-04-26 15:48:45下载
- 积分:1
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LCD1602
这是一个LCD1602底层驱动代码,TI公司LM3S系列的(This is a LCD1602 underlying driver code, TI company LM3S series)
- 2013-10-30 16:40:45下载
- 积分:1
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用于fpga学习,共同分享学习经验和交流学习心得
用于fpga学习,共同分享学习经验和交流学习心得-For fpga to learn, to share learning experiences and the exchange of learning
- 2022-02-25 22:21:38下载
- 积分:1
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FPGA_AD7822
基于FPGA的AD转换控制器设计,AD7822,quartus II,verilog hdl(A Design of the A/D Convertion Control Module Based on FPGA)
- 2011-08-26 15:06:18下载
- 积分:1
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uart_test
说明: 用于实现上位机与下位机之间通过RS232协议来进行通讯。(It is used to realize communication between upper computer and lower computer through RS232 protocol.)
- 2019-03-13 14:15:24下载
- 积分:1
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采用Verilog HDL硬件语言设计,实现基本的公用电话计费功能,设计完整....
采用Verilog HDL硬件语言设计,实现基本的公用电话计费功能,设计完整.-Using Verilog HDL language hardware design, the realization of the basic public telephone billing function, design integrity.
- 2022-02-25 23:14:29下载
- 积分:1
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UART
通过PC串口调试助手向MINI板发数据(HEX),在数码管显示接收到的数据,并回传给PC(The debugging assistant sends data (HEX) to MINI board through PC serial port, displays the received data in the digital tube and sends it back to PC)
- 2018-11-15 22:36:21下载
- 积分:1