VHDL的初学者可以参考此VHDL加法器，相信会给你带来不小的收获...

基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

that file is different I2S example

8级cordic 算法verilog (8 cordic algorithm verilog)

Use full for knowing board details while making projects on FPGA and matlab simulations

基于FPGA实现的神经网络算法ANN。针对手势识别，不错的参考文章。(Hand Postures Recognition System Using Artificial Neural Networks Implemented in FPGA)

《精彩51单片机教程》适合初学者，很难得(" Discover the 51 SCM Guide" for beginners, very rare)

Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency

uart串口传输的verilog RTL级源码，已通过仿真验证。文件主要包含发送、接受位处理，发送、接受字节帧处理，对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of frame processing, serial communications, a friend of learning helps

AES算法在FPGA上的实现，对AES算法所用的器件资源进行了总结(AES on FPGA the Fastest to the Smallest)

说明：  HDMI IP的verilog实现，vivado平台生成的IP核(Verilog implementation of HDMI IP)