登录
首页 » VHDL » based on VHDL development mcu with external device interface, mcu solve the high

based on VHDL development mcu with external device interface, mcu solve the high

于 2023-06-24 发布 文件大小:1.26 kB
0 131
下载积分: 2 下载次数: 1

代码说明:

基于VHDL语言开发的mcu与外部器件的接口程序,解决了高速mcu与低速外部器件的接口问题。-based on VHDL development mcu with external device interface, mcu solve the high-speed and low-speed external device interface.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • PCI_arbi
    PCI arbi verilog source code
    2009-03-29 18:04:41下载
    积分:1
  • 一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (mo...
    一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard memory chip for storage.两种方式,包含testbench-Verilog language describes a synchronous fifo, including: Fifo using declared registers for storage and Fifo using (model of) standard memory chip for storage. In two ways, including Testbench
    2022-08-21 18:15:23下载
    积分:1
  • spi_interface
    spi通用串行总线,4线控制,可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)
    2019-04-29 12:37:55下载
    积分:1
  • VHDL代码的程序去抖按钮
    应用背景当你按下一个按钮有一个反弹的效果,因为金属零件连接另一个按钮是不理想的,导致一个读错误的微控制器。如果我们有一个按钮,打开或关闭一个LED,如果我们不实施反弹跳过滤器(软件或硬件)将不准确的击键。有时apretará和LED不行动。关键技术软件解决方案是基于实现代码过滤按键最少x毫秒是不稳定的,所以我们知道什么是对的和别人接触是不考虑
    2022-01-27 13:53:13下载
    积分:1
  • FM radio decoder and controller VHDL, Xilinx provide. I thank other.
    FM收音机的解码及控制器VHDL语言实现,Xilinx提供的.别谢我.-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
    2022-10-05 04:50:03下载
    积分:1
  • AD9648_ver
    FPGA通过SPI总线配置AD采集芯片AD9648的程序,Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)
    2013-09-27 17:28:14下载
    积分:1
  • 硬件描述语言,verilog HDL,实现了解码器的设计
    硬件描述语言,verilog HDL,实现了解码器的设计-hardware description language, verilog HDL, the decoding of Design
    2022-06-03 04:23:49下载
    积分:1
  • float_multi
    说明:  FPGA Verilog浮点数乘法运算,采用单精度浮点型小数格式,运算结果精度可设置,可封装成IP核(FPGA Verilog floating-point multi operation, using single precision floating-point decimal format, the accuracy of the operation results can be set, can be packaged into IP core)
    2020-07-02 01:20:01下载
    积分:1
  • 用Actel公司的Fusion系列FPGA开发的LCD实验程序
    用Actel公司的Fusion系列FPGA开发的LCD实验程序-Fusion with Actel s FPGA development series LCD Experimental procedures
    2022-03-18 21:57:28下载
    积分:1
  • pidd
    VERILOG HDL pid算法 带仿真验证(pid by verilog HDL)
    2020-11-13 10:09:43下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载