VHDL与源代码包

VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)

acousting fingerprint enhancement

INTEL 微处理器 第八版 答案 从第二章开始，奇数偶数的答案都有。(INTEL microprocessor eighth edition answer from the beginning of the second chapter, the answer has odd and even.)

基于sopc ep2c5开发板的液晶字符显示例程-Sopc ep2c5 development board based on liquid crystal character display routine

说明：  直接数字式频率合成器DDS设计、Verilog。 产生的信号可以是正弦波或方波、三角波、锯齿波等，自选。 采用DDS技术，将所需生成的波形写入ROM中，按照相位累加原理合成任意波形。 此方案得到的波形稳定，精度高，产生波形频率范围大，容易产生高频。 本实验在设计的模块中，包含以下功能： （1）通过 freq 信号输入需要的频率的值； （2）通过 wave_sel 信号选择所需的波形； （3）通过 amp_adj 信号选择波形放大的倍数。(DDS design of direct digital frequency synthesizer, Verilog. The generated signal can be sinusoidal or square wave, triangular wave, sawtooth wave and so on, optional. By using DDS technology, the required waveforms are written into ROM, and arbitrary waveforms are synthesized according to the principle of phase accumulation. The waveform obtained by this scheme is stable, accurate and easy to generate high frequency waveform. This experiment includes the following functions in the designed module: (1) Input the required frequency value through freq signal; (2) Choosing the required waveform by wave_sel signal; (3) Select the multiplier of waveform amplification by amp_adj signal.)

改进的DCT算法设计，veriloghdl实现-Improved DCT algorithm design, veriloghdl realize

FPGA UART 发送端程序 verilog语言编写 9600波特率 实用(UART transmit side program verilog language 9600 baud)

说明：  APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)

说明：  通过一个计数器来实现输出信号的占空比要求，可以将duty_cycle分配到拨码开关上,LED分配到发光二极管上,然后调节拨码开关,即可看到LED的亮度发生变化.(The duty cycle of the output signal can be assigned to the dial switch by a counter, and the LED can be assigned to the light emitting diode. Then the brightness of the LED can be seen by adjusting the dial switch.)

应用背景这是lm016液晶的VHDL代码。lm016液晶显示器基本上由2行和2列组成。有2种类型接口，8）1位接口2）4位接口在这个包中给出了8位接口代码因为它很容易，但唯一的缺点是，它使用了更多的引脚数据和指令传输。关键技术此代码是 测试；FPGA开发板–xc6slx9-tqg144斯巴达6注意：液晶显示器引脚数字引脚47液晶使能引脚数字引脚50LCD RW引脚数字引脚48LCD D0引脚数字引脚51液晶D1引脚数字引脚55LCD D2引脚数字引脚56LCD D3引脚数字引脚57LCD D4引脚数字引脚58LCD D5引脚数字引脚59LCD D6引脚数字引脚61液晶D7引脚数字引脚62