8051MCU in the FPGA to achieve the source code, using VHDL language

数字钟通过verilog实现，并且支持Modelsim仿真(The digital clock is implemented by Verilog and supports Modelsim simulation)

vga 测试代码，可以显示任意彩条，棋盘，花纹(VGA test code, can display any color bar, chess board, decorative pattern )

说明：  report for a report for a class

MD5 算法在Xilinx FPGA上的实现，希望对大家有用。(MD5 algorithm in Xilinx FPGA Implementation, in the hope that useful to everyone.)

一个简单的微处理器的实现，能够进行几种常见的操作，对于熟悉计算机的工作原理很有帮助，并且附有详细的设计报告和设计思路。在word文档最后给出了源代码。-a simple microprocessor to achieve, for several common to the operation of the computer for those familiar with the working principle helpful, and with the detailed design reports and design ideas. The word is the final document source code.

光纤发送接收模块，verilog编写，主要用于光纤的发送和接收，波长1310nm(Fiber optic transmitter receiver module, verilog written primarily for transmitting and receiving the optical fiber, wavelength 1310nm)

vhdl,序列信号发生器，发出11101010，可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of

说明：  使用DDR3IP核进行仿真，写入读取数据(Using DDR3IP core to simulate, write and read data)

vhdl code for 8051 processor

用于FPGA的学习，大家值得借鉴，可以好好学习一下(this is for fpga and you can use this.)