一个UDP／IP核心架构的VHDL实现

Altera DE2 开发板试验2 第1部分VHDL答案(Altera DE2 Lab2 part1 VHDL answer)

Implementation of Serial Infrared decoder for low-speed IrDA communications.

说明：  stepper motor module on spartan 6 and 24MHz clock fequency

上海外滩看到的最大的LED显示屏的内核源代码，主要是完成视频信号的远距离传输的编解码与接口转换-Shanghai Bund to see the largest LED display in the kernel source code, mainly to complete the long-distance video signal transmission codec conversion and interface

基于fpga的多功能电子钟的设计非常使用希望对大家有帮助啊-FPGA-based multi-functional electronic clock design to use would like to help everyone ah

cycloneIII_3c120_dev_power_demo atlera公司官方例程(cycloneIII_3c120_dev_power_demo atlera company official routines)

verilog实际例子，非常适合初学者学习(verilog practical examples, very suitable for beginners to learn)

浮点数运算的FPGA实现，包括仿真文件。(FPGA realization of floating-point operations, including the simulation file)

lgpl RS编解码 5-6 Reed-Solomon Codes-LGPL RS codec 5-6 Reed-Solomon Codes