Verilog code to calculate Sobel

VHDL handbook is very nice and suitable guide to HVDL language

FPGA资料与所用元器件的数据参考手册与应用指南(ds312_Spartan-3E FPGA Family )

数字钟的VHDL语言程序，包含了好几个模块，是毕业设计的优秀程序，值得下载！(VHDL language program of digital clock, contains several modules, is an excellent program, graduation design is worth to download!)

vhdl经典源代码――vga控制，入门者必须掌握-vhdl classical source code-- vga control, beginners must master

8051单片机VHDL内核,内有说明,很详细,值得下载-8051 VHDL core, which has made it clear that, in great detail, it is worth downloading

实现千兆以太网数据发送，通过GMII接口向PHY写数据，控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)

FPGA based implementation of a SDR - codes in Verilog HDL for the processor and control.-FPGA based implementation of a SDR- codes in Verilog HDL for the processor and control.

nios学习资料，fpga调用外部sdram实例，值得初学者下载。(nios learning materials, fpga call external sdram instance, it is worth beginners to download.)

Efficient_Digital_Implementation_of_Extreme_Learning_Machines_for_Classification

说明：  基于EasyFPGA030的四位数字密码锁。(Based on the four-digit lock EasyFPGA030.)