基于Actel A3P030 FPGA液晶显示器使用jdl12864串行接口，时钟可调

在quartusII环境下采用对编解码芯片HD6408和HD6409驱动的方式实现曼彻斯特编解码(Environment in quartusII codec chip used on the HD6408 and HD6409-driven way to achieve encoding and decoding of Manchester)

载波同步，costas环，基于Verilog的载波同步环(Carrier synchronization, costas ring, based on Verilog carrier synchronization ring )

关于一个串行数据输入 根据时序将数据分两路输出的程序 (on a serial data input timing will be based on output data using two procedures)

EKG SIGNAL PROCESSING THROUGH CORDIC

huffman transform in vhdl language

基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02

基于FPGA的PCM编码器与解码器的设计-about fpga and pcm

序列检测VHDL源代码，ATERA平台编译。详细的报表说明和模拟源代码。

win10的xilinx usb驱动，较新版本(Xilinx USB driver for win10, newer version)

数字系统设计的入门书，教你如何学会用verilog语言实现各种数字逻辑功能，例程经典易懂(xiawenyu verilog)