参数化FFT源代码，点数和位宽可变，内附testbench和说明文档

VERILOG语言速查手册,与VHDL齐名的另外一硬件描述语言(verilog language manuals, and the other enjoying VHDL hardware description language 1)

说明：  lattice的官方8b10b代码, 1012年版本，diamond3.5编译。(lattice 8b10b encoder decoder code)

串并转换程序，由串行输出转换为4位的并行输出-String and the conversion process, from the serial output is converted to 4-bit parallel output

自己完成的项目，成功用vhdl语言实现数字跑表，可存储。

通过modelsim仿真检测matlab生成滤波器效果。(Generate the filter through matlab and simulated by modelsim.)

高速计算机旋转坐标算法的硬件实现，用于快速傅里叶算法的核心单元-Rotating coordinates high-speed computer hardware algorithm for fast Fourier algorithm is the core unit

利用FPGA控制VGA显示器显示字符汉字的程序，里面有注释。(VGA display with FPGA control procedures Kanji characters, there are comments.)

应用vhdl语言进行加法器的设计，比较器的设计，随着vhdl语言的应用越来越广泛，其重要性也更加明确。希望对大家有所帮助。-application vhdl language adder design, compared with the design, With vhdl language widely used, the importance of which was more explicit. We want to help.

我是VHDL的初学者，这是我自己编译的简单的几个VHDL码，功能有3-8解码器及其testbench,16位寄存器及其testbench和交通灯。 希望能和其他初学者一起讨论学习，并得到高手的指点-I VHDL beginners, this is my own translation of a few simple VHDL code. 3-8 function decoder and testbench, 16 Register and testbench and traffic lights. Hopes to be able to discuss other beginners learning, and with the guidance of the master

基于fpga的4*4键盘扫描verilog程序-du to fpga 4*4 keyscan verilog