du to fpga 4*4 keyscan verilog

说明：  matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)

无刷直流电机 VHDL VERILOG 控制,速度环，RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA( actel VERILOG BLDC control of the use of actel FPGA)

VHDL operators basics

用VHDL制作的I2C控制器，是一个component,之间添加就可以使用。-VHDL produced using I2C controller, is a component, you can use to add between.

说明：  基于高清视频的3D人脸识别源代码，四万多行，经过FPGA实际验证，最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)

SPI的Verilog实现(非常的全面和详细，还带有SPI算法的注解)(SPI in Verilog implementation (a very comprehensive and detailed, but also with the SPI algorithm annotation))

改写四号中断的 自己编的，，，，，，求过啊！！！一个很简单的小程序(Rewrite the fourth interruption of their series,,,,,, begged ah! ! ! A very simple little program)

数字电子钟用自拍图像代替了内置图像的石英制作

旋转LED 实现自适应转速 字幕滚动 对接的程序(Rotating LED Adaptive Speed ​ ​ subtitles scroll docking program)

说明：  本人写的数字锁相环，有模拟数据，学习锁相环很好的材料。参考书“数字锁相环路原理与应用”编写。(I write the digital phase-locked loop, have simulated data, a good phase-locked loop learning materials. Reference book )