du to fpga 4*4 keyscan verilog

基于VHDL的TPC译码器的设计，简述了tpc译码的算法步骤，tpc硬件实现的模块和部分vhdl程序(TPC decoder VHDL-based design, outlines the decoding algorithm steps tpc, tpc hardware modules and some vhdl program)

Cirrus Logic EP9302 原理图 ORCAD格式-Cirrus Logic EP9302 schematic ORCAD format

此是进行循环冗余效验的Verilog编码，适合多种标准，如CRC16(this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY)

verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.

说明：  FPGA 点亮数码管的灯，本例程支持6位数码管，因为我的FPGA开发板是这样子的(The lamp of digital tube illuminated by FPGA)

135个经典VerilogHDL源码和说明文档，入门的好资料-135 Classic VerilogHDL source and documentation, a good data entry

基于VHDL+FPGA的DDS信号发生设计，已经通过调式-Based on VHDL+ FPGA design of the DDS signal has been through mode

代码实现了一个由32位寄存器组成的寄存器组，并有多个控制输入和两个输出，方便使用。(The code implements a 32-bit register consisting of registers, and there are multiple control inputs and two outputs, easy to use.)

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)

一些verilo的经典实例，非常适合初学者(verilo of the classic examples, for beginners)