用VHDL语言编写一计时范围为59.99秒的跑表

verilog实现闪烁灯和流水灯dechengxu-verilog liushuideng shanshuodeng chengxu

VHDL 的100例程代码，能够使你熟练掌握VHDL语言的编写(100 routines of VHDL code, enabling you to master the preparation of the VHDL language)

说明：  I2C读程序，通过状态机描叙,仿真达到要求(I2C Reading, depicts through the state machine, called Simulation)

串口通信通用模块，FPGA Verilog语言 ise，vivado环境(uart,FPGA Verilog, ise,vivado)

比较详细的阐述了图像压缩的原理,并基于DSP和VHDL实现该系统,最后在FPGA上通过.(More detailed exposition of the principles of image compress, and VHDL-based implementation of the system, and finally in the FPGA.)

适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT

四人抢答器，包括主持人清楚按键，抢答后屏蔽其他三人的继续抢答，同时答题时间开始，答题时间三档可调。时间到后蜂鸣器发声，指示灯亮起。

code for booths multiplier

URAT 部分VHDL源码 大家多多支持 哈哈 -VHDL source URAT part of U.S. support of Haha

VHDL tutorial for self studying