登录
首页 » VHDL » 24秒倒计时系统(有跑马灯) 利用CPLD

24秒倒计时系统(有跑马灯) 利用CPLD

于 2022-03-26 发布 文件大小:284.75 kB
0 153
下载积分: 2 下载次数: 1

代码说明:

24秒倒计时系统(有跑马灯) 利用CPLD-24 seconds remaining systems (5,250) using CPLD

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 使用硬件描述语言(VHDL)的实现或门
    entity or1 is(a,b:in std_logic;y:out std_logic);architecture dataflow of or1 isbeginy
    2022-03-11 13:09:15下载
    积分:1
  • ecc
    This paper analyzes the cryptography scheme of the Trust Platform Model(TPM). The focus of the discussion would be the comparison of elliptic curve cryptography and the nowadays widely used 2048-bit RSA in evaluating which would be better suited to be used on TPM. A TPM implementation scheme based on ECC is proposed, which includes encryption and decryption schemes, signature and verification scheme, key agreement scheme. Corresponding examples of TPM commands would also be given.
    2019-06-13 14:53:45下载
    积分:1
  • gio_mio_emio_axi
    codes for zynq devices
    2014-06-23 19:00:03下载
    积分:1
  • ALTERA嵌入式设计大赛获奖作品文章,非常适合DE2开发参考
    ALTERA嵌入式设计大赛获奖作品文章,非常适合DE2开发参考-ALTERA Embedded Design Competition Prize-winning article, very suitable for the development of reference DE2
    2022-04-07 11:00:16下载
    积分:1
  • 用VerilogHDL进行频率生成器。
    yong VerilogHDL yu yan bianxie de pinlv fa sheng qi,shi yong ISE ruan jian da kai.-Used VerilogHDL to make a frequency builder.
    2022-01-21 03:50:48下载
    积分:1
  • ADPCM(1)
    adpcm .c程序代码,完整,通过编译仿真(ADPCM c program code, complete compiled simulation)
    2013-04-17 17:07:54下载
    积分:1
  • 96x96数字复用/解复用SPI
    96x96 Digital MUX/DEMUX via SPI
    2023-08-24 02:45:04下载
    积分:1
  • Xilinx ISE License
    说明:  Xilinx ISE License集合,包含Vivado、ise的破解license,安装ISE后loading license即可完成,最全的器件库(Xilinx ise license Collection, including Vivado and ISE cracking licenses. After ISE is installed, the loading license can be completed, which is the most complete device library.)
    2021-01-19 23:28:43下载
    积分:1
  • 数字频率计数字频率计
    数字频率计 数字频率计-Digital frequency meter digital frequency meter
    2022-01-24 16:05:05下载
    积分:1
  • Verilog代码。注册成功,对FPGA的使用标准单元库…
    verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
    2022-04-14 16:29:39下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载