Synthesizable model of Atmel Application of ATmega103 mi crocontroller. (VHDL IP...

通过CPLD将8位并行数据转换为串行数据并可以采用I2C方式与其他器件连接，可以用于MCU需要与提供I2C接口器件通信的场合。-through CPLD to eight parallel data into serial data and methods can be used I2C connections with other devices, which can be used to provide MCU with I2C Interface Communications occasions.

Programmable IIR Filter written in Verilog and its respective modules.

VHDL_modelling_guidelines是vhdl建模开发的指导资料-VHDL modeling VHDL_modelling_guidelines is guiding the development of information

VHDL语言实现摄像头的捕捉和采集,通过仿真验证，很好哈-vidicon s catch and collection in VHDL

用vhdl实现的booth算法乘法器，包含了multiplexer和rca adder，同时提供了一个测试文件，modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)

VHDL语言设计；功能描述：键盘扫描，不包含去抖电路-VHDL language design Function description: the keyboard scanning, does not contain a circuit debounced

本人初学VHDL时编的比较系统的VHDL源程序 巨实用 (I am learning more systematic series of practical VHDL source Giant)

数字钟的VHDL语言程序，包含了好几个模块，是毕业设计的优秀程序，值得下载！(VHDL language program of digital clock, contains several modules, is an excellent program, graduation design is worth to download!)

利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期-Use of FPGA technology to achieve the pulse-width test, based on VHDL, test error of clock cycles

10进制计数器，VHDL描述的，实验必备-10 hexadecimal counters, VHDL description of the experiment must