mimasuo

描述了使用FPGA接口PDIUSBD12开发USB接口的流程.-Describes the use of FPGA Interface USB interface PDIUSBD12 development flow.

说明：  8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs(eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion)

Quartus环境下多路选择器的编写代码，适合初学数字逻辑设计的进行学习(MUX in Quartus)

用VHDL和verilog实现的四人抢答器-using VHDL and verilog realization of four Responder

这是兼容的8051 VHDL CPU实现，应该不算侵权吧。 上帝保佑！-This is compatible CPU 8051 VHDL, it is not a tort. God bless!

linux cmd line download script

10进制计数器，VHDL描述的，实验必备-10 hexadecimal counters, VHDL description of the experiment must

说明：  This paper analyzes the cryptography scheme of the Trust Platform Model(TPM). The focus of the discussion would be the comparison of elliptic curve cryptography and the nowadays widely used 2048-bit RSA in evaluating which would be better suited to be used on TPM. A TPM implementation scheme based on ECC is proposed, which includes encryption and decryption schemes, signature and verification scheme, key agreement scheme. Corresponding examples of TPM commands would also be given.

verilog实现的1024位的大数模逆算法，引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel

一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)