This is an 16 bit adder using vhdl

通过PCI数据传输总线，实现PC到PCI板卡的高速数据传输，PCI总线使用9054芯片进行总线协议的转换(Realizing data transmission of PCI)

使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现先进先出的队列。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 Development Board to achieve FIFO queue.

说明：  这是一个单个的九层的电梯控制系统的VHDL代码，具有外部上下楼控制按钮和内部上下楼控制按钮。另外还有测试代码。(This is a design of nine floor lift control system with VHDL code and testbench.)

初学ＶＨＤＬ有用的，了解后对复杂设计有很大帮助．-VHDL beginner useful understanding of the complexity of the design has been inspired by them.

this is the source code we have been working on for our project using altera de2 board. the code can be run but some of it miss the end game module, while some doesn t have the complete vga code

基于单片机的DDS信号发生器，具有DDS思想的单片机编程。。。(Sunplus based DDS signal generator with DDS thinking microcontrollers. . .)

运用VHDL语言编写的检测1111的序列检测代码和加法器，运用verlog语言的交通灯，流水灯，出租车自动计费器等                                                                            

verilog，4、5分频器，5分频器占空比3：2-Verilog, 4,5 dividers, five dividers ratio of 3:2

d flip flop t flip flop counter mux using active hdl can be run using 3.2 version and creating new design

51单片机测试程序，ＩＣ:UC1676,4线串口(51 MCU test program, IC:UC1676 4-LINE, SPI INTERFACE)