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gff_int_mul
application of a galois field multiplication and normal multiplication
- 2008-05-28 16:23:11下载
- 积分:1
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利用verilog语言设计公共电话共包括以下几个状态:挂机、待机、身份确认、修改密码、通话等五个状态。内含详细的源码以及设计过程、模块...
利用verilog语言设计公共电话共包括以下几个状态:挂机、待机、身份确认、修改密码、通话等五个状态。内含详细的源码以及设计过程、模块-The use of public telephones were verilog language design include the following states: hang up, standby, identification, change passwords, call the five states. Includes a detailed source code as well as the design process, the module
- 2022-02-25 00:52:03下载
- 积分:1
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6. For the key to enter a password lock, assuming that reset after the seven lam...
6对于进入密码锁的按键,假设复位后七个灯显示" 0",使用sw1、sw2 2,然后只要按下并松开sw2,七个灯上就显示" 2",而只要按下并松开sw1,七个灯上就正确显示值" 1
- 2022-03-11 23:10:49下载
- 积分:1
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135个经典VerilogHDL源码和说明文档,入门的好资料
135个经典VerilogHDL源码和说明文档,入门的好资料-135 Classic VerilogHDL source and documentation, a good data entry
- 2022-01-20 23:10:53下载
- 积分:1
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yuanchengxu
基于Verilog HDL的通信系统设计(Design of communication system based on Verilog HDL)
- 2011-11-19 13:36:54下载
- 积分:1
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vbyuanma
示波器的源码,基于串行口的,(oscilloscope source code, based on the serial port,)
- 2007-04-18 19:11:22下载
- 积分:1
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内附多路选择器,74系列芯片VHDL源码,加法器,FIR,比较器等大量例子,对初学VHDL语言很有好处。可用maxplus,quartus,synplicity...
内附多路选择器,74系列芯片VHDL源码,加法器,FIR,比较器等大量例子,对初学VHDL语言很有好处。可用maxplus,quartus,synplicity等综合软件进行调试-contains multiple-choice, 74 chips VHDL source code, the adder, FIR, comparators, etc. are plenty of examples for beginners VHDL very good. Available maxplus, Quartus, synplicity integrated software debugging
- 2022-08-11 02:50:00下载
- 积分:1
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基于sopc ep2c5开发板的rs232例程
基于sopc ep2c5开发板的rs232例程-On sopc ep2c5 development board rs232 routines
- 2022-02-05 03:28:05下载
- 积分:1
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vga_strip_caitiao
vga 测试代码,可以显示任意彩条,棋盘,花纹(VGA test code, can display any color bar, chess board, decorative pattern
)
- 2014-08-29 12:54:07下载
- 积分:1
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dgnszsz
多功能数字钟,在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)
- 2013-09-20 10:20:31下载
- 积分:1