-
页面置换算法中的三种算法相关程序代码
FIFO LUR OPT
页面置换算法中的三种算法相关程序代码
FIFO LUR OPT-yemianzhihuansuanfa
- 2022-10-19 08:10:03下载
- 积分:1
-
apb.v
AMBA总线apb总线的verilog代码以及相关的中断控制。(AMBA bus apb bus verilog code and associated interrupt control.)
- 2021-04-17 20:38:53下载
- 积分:1
-
正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过...
正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
- 2023-07-26 10:55:02下载
- 积分:1
-
count16
制作16位流水灯,实现LED模块对于拨杆0和1的识别(Making 16-bit pipeline lamp to realize the recognition of dial rod 0 and 1 by LED module)
- 2020-06-24 01:20:02下载
- 积分:1
-
fpga_sdram_inst
nios学习资料,fpga调用外部sdram实例,值得初学者下载。(nios learning materials, fpga call external sdram instance, it is worth beginners to download.)
- 2013-08-24 22:26:31下载
- 积分:1
-
jiaotongled
该源码用vhdl语言制作了一个简单的交通灯,方便大家学习~~(The source vhdl language produced by a simple traffic light, facilitate learning ~ ~)
- 2010-11-20 14:44:36下载
- 积分:1
-
my_lms
自适应滤波,对输入信号进行选择性的加权处理,使输出达到最优化,并且能够跟踪和适应系统和环境的动态变化(Least mean square,of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment)
- 2010-10-14 15:30:00下载
- 积分:1
-
A3P600-PQG208
Actel FPGA A3P600最小系统原理图,包含JTAG 、电源和封装 (Actel FPGA A3P600 minimum system schematics, including JTAG, power and packaging)
- 2012-12-03 11:29:19下载
- 积分:1
-
modulation-and-demodulation
通过verilog语言实现各种基本信号的调制解调过程,包括2psk,qpsk,ppm(Realize the modulation and demodulation process of various basic signals through verilog language, including 2psk, qpsk, ppm)
- 2018-04-26 21:52:04下载
- 积分:1
-
my_booth_mp
booth algotihm verilog design and test
- 2016-06-14 16:02:10下载
- 积分:1