可编程逻辑器件实验

vhdl code fpga for lcd 2*16

主要是RS-232串行接口技术并且通过了串行收发器UART的开发实例演示了接口设计的基本步骤程序-Is RS-232 serial interface technology and, through a serial UART transceiver development of interface design examples demonstrate the basic steps of the procedure

verilog program for real time clock.. select the .v file to view the code.

verilog实现基于i2s协议接口，在fpga上验证通过。(Verilog implements the interface based on I2S protocol and verifies it on fpga.)

说明：  FFT 1024 point, in 10 state

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices.

压缩包是ti xds100v3 Design kit的安装文件，安装后有原理图、PCB文件，与DSP接口采用FPGA，安装后有源码，是VHDL格式的，支持开源，降低开发成本(Compression package is ti xds100v3 Design kit installation file after installation schematics, PCB files, and DSP interface with FPGA, after installation source is VHDL formats, support for open source, reduce development costs)

自己做的数码管显示的时钟 一个非常简单的FPGA时钟 用累加做的(To do their own digital display clock of the FPGA clock is a very simple to do with the cumulative)

4选1数据选择器，有使能端控制，4个数据输入，2个地址端，1个输出(4 1 data selector, enable end control, four data inputs, two addresses end, an output)

音乐和的设计，硬件语言描叙，书上的源代码哦(Music and design, hardware language describes, the book s source code Oh)