FPGA

这是一个在FPGA上实现CRC算法的程序，包含了CRC-8,CRC-12,CRC-16,CRC-CCIT,CRC-32一共五种校验形式。-err

控制路线和街道交叉口的简单程序，路线优先，街道上有车辆检测器；

可以产生ASK FSK PSK 等调制信号。非常好用已经实现了所有功能。在硬件测试通过了(Can generate ASK FSK PSK modulated signals and so on. Is very easy to use all the features has been achieved. On the hardware test of the)

IS611v25616在NIOS II 下的驱动-NIOS II in IS611v25616 under the driver

this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural -this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural

非常好的SDRAM Controller 设计文档。工程必备-SDRAM Controller Design of a very good document. Works required

一个可以把信号拉长任意个CLk的VHDL源码例子。详见说明文档-A signal can be stretched any one CLk the VHDL source code examples. See documentation

this is a Multiplier and Accumulate (MAC). written in VHDL

FSK编码器和译码器,有需要的朋友可以看看！(FSK encoder and decoder, there is a need friends can see!)

用verilog编写的分辨率提高的源代码 采用双线性插值(Written resolution with the verilog source code to improve the use of bilinear interpolation)