登录
首页 » VHDL » 基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助

基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助

于 2022-02-03 发布 文件大小:232.94 kB
0 154
下载积分: 2 下载次数: 1

代码说明:

基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助-and ideally xinlinx 7 of the code led display program, and I hope to help you

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • IEEE Standard for Verilog 2005
    IEEE Standard for Verilog 2005
    2017-06-05 13:53:12下载
    积分:1
  • MVB通信架构和流程图
    MVB架构流程图。MVB开发用,大连海天资料(MVB development, Dalian Haitian data)
    2018-09-17 21:39:23下载
    积分:1
  • 增强型8051的VHDL源代码,两个周期执行一条指令,仿真工具为Modelsim,开发板为Altera的EP1C20开发板...
    增强型8051的VHDL源代码,两个周期执行一条指令,仿真工具为Modelsim,开发板为Altera的EP1C20开发板-enhanced 8051 VHDL source code, the implementation of a two-cycle instruction, simulation tools for Modelsim, development board for the Altera EP1C20 development board
    2022-07-06 19:09:46下载
    积分:1
  • uvm-1.2.tar
    UVM 1.2 golden code, (code for UVM, )
    2015-02-25 16:37:19下载
    积分:1
  • cyc2_cii5v1
    这是1C6开发板上元件的具体资料。此开发板有掉电不丢失程序的功能,就是靠着几个芯片(development board components specific information. This development board is not lost restart procedures, it was relying on a few chips)
    2007-02-15 10:22:14下载
    积分:1
  • 234
    在接收信号的数字化、软化的实现中,数字下变频起着重要的作用。本文首先介绍了数字下 变频的组成结构,然后详细分析了数字下变频的工作原理,描述了在实现数字下变频时,设计方案所 采用的高效滤波器———CIC 滤波器和多相抽取滤波器的结构和原理。最后,用通过Simulink 对数字 下变频的性能进行了仿真。在仿真的基础上使用Insight 公司的FPGA 开发系统,用测试电路实测了 数字下变频的性(In the receiving digital signal, softening the realization, the digital down-conversion plays an important role. This article first introduced the digital down conversion of the composition, and then a detailed analysis of digital down conversion of the working principle described in the realization of digital down conversion, the design used in high-performance filters--- CIC filters and multi-phase extraction filter structure and principle. Finally, with the adoption of Simulink for digital down-conversion performance of the simulation. In the simulation based on the use of Insight s FPGA development system is measured using the test circuit of the digital down-conversion of)
    2021-03-16 21:29:21下载
    积分:1
  • rs_204_188----v1.0
    RS 编码和解码Verilog Code, 实现了RS(204,188)的编码和译码;(RS Coding and Decoding Verilog code, implement RS(204,188) )
    2021-03-25 20:29:14下载
    积分:1
  • keygen
    ISE 9.2 serials working
    2021-03-29 14:39:10下载
    积分:1
  • sync-and-asyn_FIFO_verilog
    同步与异步FIFO的verilog实现,包括源代码,testbench,测试以及综合通过,还有相关参考资料(Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references)
    2021-03-07 14:19:29下载
    积分:1
  • 这是一个FPGA sparttan 3E基础工程,
    this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.
    2022-11-15 01:50:04下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载