各种常用模块的VHDL描叙实例，PDF格式

at070tn83 800x480 tft lcd verilog 測試 quartus 文件 (800x480 tft lcd at070tn83 testing project file)

本人写的数字锁相环，有模拟数据，学习锁相环很好的材料。参考书“数字锁相环路原理与应用”编写。-I write the digital phase-locked loop, have simulated data, a good phase-locked loop learning materials. Reference book

用verilog语言写的简单的键盘扫描代码，适合初学者，用alter的软件编写的程序代码。(Using verilog language to write simple keyboard scan code, suitable for beginners, with alter software program written code.)

qpsk的fpga实现，包含调制和解调部分，使用verilog语言(FPGA implementation of QPSK)

Quartus中实现的DDS 使用的是altera提供的IP core-DDS achieved Quartus using IP core provided by altera

一个精确的到0.01s的时钟源程序，对于初学VHDL理解很有帮助，只给了源程序没有给出仿真波形-An accurate clock source to the 0.01s for the beginner to understand VHDL helpful not only to the simulation waveform of the source

bios spi flash acer 5740g

H264/AVS中的离散余弦变换DCT以及反离散余弦变换IDCT的Verilog代码(H264/AVS the discrete cosine transform and inverse discrete cosine transform DCT IDCT of Verilog code)

binary comparator with register

基于DE2-70开发板的VGA接口实现程序，可在VGA屏幕上显示800*600分辨率的图像，刷新频率60Hz