各种常用模块的VHDL描叙实例，PDF格式

基于VHDL语言的七段显示管程序， 实现9个数字循环 并且能控制播放速度(SEVEN SEGMENT DISPLAY)

1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色， 可以使用嵌入式逻辑分析仪观测信号； 3。modelsim仿真文件在proj--simulation--modelsim中(1. The source file is saved in the src directory QII project file is saved in the directory Proj 2. The functionality of the program is displayed on a VGA monitor color stripes, 8 colors, you can use the embedded logic analyzer observed signals 3. the modelsim simulation files in the proj- simulation- modelsim)

基于FPGA的电机控制 FPGA-basedMotorControl-FPGA-based motor control FPGA-basedMotorControl

按键控制LED流水灯；按键1按下前8个灯从左到右依次点亮，按键2按下中间前8个灯从左到右依次点亮，按键3按下所有灯全亮(Water control button LED lights sequentially lit buttons the eight lights left to right 1 Press button 2 press from left to right is lit in the middle eight lights, key 3 Press All full bright light)

实现两路数字信号的鉴相功能，最后通过静态LED显示出来，该程序通过硬件的测试-Realize two-way digital signal phase function, and finally through a static LED display, the program through the hardware test

hash加速器的verilog实现，也用于fpga或asic(hash verilog rtl )

利用quartus II 软件采用verilog语言设计了一个sigmoid激活函数(this work is a sigmoid ,use verilog language)

精通VerilogHDL：IC设计核心技术实例详解-proficient VerilogHDL : IC design example explanation of the core technology

48阶FIR设计，采用VHDL语言描述，门级映射……(48-oders FIR design with VHDL language and gate level)

A Full adder using half adder unit in vhdl