VHDL小程序（本人的一些小成绩哦，希望对大家有帮助）

adding custom ip EDK

VHDL Programing

用vlog语言编写的cpu控制器源代码，用于fpga的硬件编程实验-vlog language used in the preparation of cpu controller source code for programming fpga hardware experiments

gaisler公司在2011年发布的的leon3的源代码！(source code of leon3 )

说明：  FPGA 读写 SRAM 存储块，verilog代码(Read and write SRAM memory block and Verilog code in FPGA)

基于cordic算法的DDS的Verilog代码。经过仿真验证，绝对可靠。(Based on cordic algorithm DDS Verilog code. Through the simulation, is absolutely reliable.)

本代码是实现了lwip协议栈,可以移植到其他类型的嵌如式操作系统上-This code is to achieve a lwIP protocol stack can be ported to other types of embedded operating systems such as the type

I2C总线控制器 altera提供的VHDL的源程序代码-I2C Bus Controller ALTERA the VHDL source code

微功率无线模块、小功率无线数传模块、远距离无线通信模块、数传电台、远距离无线通信基站以及无线通信收发器等系列产品，产品主要有无线数传模块、无线通信模块、无线通讯模块、无线收发模块、无线模块、无线射频模块等等。-micropower wireless modules, low-power wireless module, remote wireless communications modules, data-transmission stations, long-distance wireless communications base stations and wireless communications transceiver series products, the main products are wireless module, wireless communications modules, wireless communications modules, wireless transceiver module, wireless modules, RF modules and so on.

艾米电子的液晶1602的Verilog语言程序 (Amy e-LCD 1602 of the Verilog language program)