OFDM 调制与解调

基于Max+Plus II和VHDL的电子密码锁设计(Based on Max+ Plus II electronic lock and VHDL design)

MICarrayWeights and MICarrayplot

EDA用maxplus2开发设计的简易数字钟，适合初学者，vhdL语言(EDA maxplus2 in development and design of simple digital clock, is suitable for beginners, vhdL language )

The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.

计数器的程序，eda编程用的，vhdl语言编程，大家下载看看吧(Program counter, eda programming used, vhdl programming )

《Verilog HDL 程序设计教程》2-"Verilog HDL Design Guide," 2

这是 MIPS32 设计的一部分，它是面向 FPGA。它已经过测试与系统的 verilog，通过所有考试。它实现了几个 instrucctions。和它是河津 fot 计时员。它 implemets 逻辑和 aritmetics instruccions，它已被写入 VHDL 中。

LCD例程 altera官方Verilog代码 详尽简单实用-LCD routines altera official Verilog code is simple and practical details

EAB_VHDL

vhdl的一个串行序列信号发生器的设计与实现-vhdl sequence of a Serial Signal Generator Design and Implementation