RiscCpu

Implement LMS vhdl code.

基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。(FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.)

Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA. Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit! The UART controller was simulated and tested in hardware.

FPGA简:讲述了FPGA的基本概念、结构、发展-Jane FPGA: FPGA describes the basic concepts, structure, development

基于FPGA的PCM编码器与解码器的设计-about fpga and pcm

带有异步清零、异步置位功能的边沿JK触发器(With asynchronous reset, asynchronous setting function of edge JK flip-flop)

此程序完成了FLASH的擦除，读写的功能，并通过USB芯片FT245传送到PC...............................................................................................................................................................................................

基于FPGA的VGA控制器，可在屏幕显示彩色条纹(A vga controller based on FPGA)

一组练习，关于VHDL的一些基础的知识和练习可以参考一些具体的问题-A group of exercises, on a number of VHDL-based knowledge and practice can refer to some specific questions

Xilinx system generator