RiscCpu

24bitAD数据采样进行串并转换，并行输出。另包括24位DA并串转换，串行输出。(24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.)

一个很好的利用verilog编程实现的cpu程序，一定要好好利用。-a good use of the Verilog Programming cpu procedures, we must make good use of.

ac97 VHDL core

出租车自动计费系统，功能完善，方便快捷，十分好用-taxi

基于fpga和xinlinx ise的音乐播放器vhdl程序，希望对你有所帮助！-and xinlinx ideally music player VHDL process, and I hope to help you!

time to digital convertor

180nm数字教学库，内含各种标准数字单元(180nm digital lib for education, including standard cells)

本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.-I prepared for the sentinel division, the development of software for the ISE6.2 Xilinx, PAR through simulation.

用Verilog语言编写的产生正弦波和方波的程序(Generate sine and square wave Verilog language program)

GPS信号结构,C/A码产生方式及其测距码研究(GPS signal structure and ranging code research)