计数器的VHDL语言程序实现1

Control with DAC conversion

哈希算法FPGA实现代码，采用MD5算法，并给出了仿真波形。(MD5 hashing algorithm for FPGA implementation code)

低频数字式相位测量仪，数码管显示相位差，精度为0.1(Low frequency digital phase measuring instrument, digital pipe display phase difference )

VHDL语言实现两个人掷骰子游戏，最多6次，大者胜则结束游戏并在点阵上显示，一直平手则一直进行直到达到6次。(Achieving the dice game between two people by using VHDL language.The maximum number of times is 6.The game will over when there is a biger one in one time,otherwise,the game will continue until the time of the game is up to 6.)

一个简单的uvm搭建的ahb简单实例,包含了各个组件以及编译的运行的脚本(one sample example about ahb，include every component and compile script)

占空比1：1的通用分频模块-1:1 generic-frequency module

附件 介绍了如何 使用compxlib命令编译Xilinx的ModelSim仿真库，创建这个仿真库对ISE调用modelsim是必不可少的一步,该法完全自动化，免去繁杂的手动操作，是创建这个仿真库最简洁的方法之一-Annex compxlib introduce how to use Xilinx

vhdl code for fir filter

实光电码盘的输出数据的四倍频，使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.

本程序是用VHDL语言实现电子密码锁功能,整个系统分为三大模块,一为控制模块,二为键盘显示模块,三为处理模块-This procedure is a VHDL language electronic code lock function, the entire system is divided into three modules, one for the control module, two for the keyboard display module, three modules for the treatment