计数器的VHDL语言程序实现1

4-16译码器，用VHDL编写的，可以直接下载到可编程逻辑器件中(4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device)

stc12c5a60s2单片机做的两路呼吸灯，可以用ad和按键控制闪动频率(stc12c5a60s2 SCM done with the two breathing lights, you can use the ad and buttons to control the flashing frequency)

本实验主要是在FPGA上实现FIR数字滤波器的功能，不仅有工程文件，还具有论文资料。(This experiment mainly realizes the function of FIR digital filter on FPGA, not only has the engineering document, but also has the thesis information.)

说明：  介绍如何使用 FPGA 内部的 ROM 以及程序对该 ROM 的数据读操作。(This paper introduces how to use the ROM inside the FPGA and how to read the data of the ROM by the program.)

交通灯管理与控制系统-客户端与云网络连接并从远程位置控制的交通灯系统推导

简易环形FIFO的设计、简单异步串行通信接口设计等-verilog

同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。 系统以同步信号开始连续发送四个字节，在发送中出现5个1时插入一个0，在四个数据发送结束而下一次同步没有开始之前，发送7FH，这时中间不需要插入零 -synchronous serial data transmission circuit SSDT the basic function is to convert parallel data into serial and the same this step. System write and read sequential fully compatible Intel8086 timing. Synchronized signal system to start sending four consecutive bytes, in this emerging 5 1:00 insert a 0, at the end of four data sent and the next synchronization not started before, sending seven FH, then the middle is not inserted

适用于NIOS II的1024点FFT C算法( 1024-point FFT C algorithm for NIOS II)

Multiplexer styles in VHDL

简易双口ram，使用两个ram ip core，一个写的同时另一个读，并且包含按键使能和数码管以及流水灯显示(Simple dual-port ram, two ram the ip core, a write while another read, and contains buttons to enable digital pipe and the water light show)